abstract class DcacheBase extends DcacheModule

Linear Supertypes
DcacheModule, HasDcacheParameters, HasRiftParameters, Module, RawModule, BaseModule, IsInstantiable, HasId, InstanceId, AnyRef, Any
Known Subclasses
Ordering
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  2. By Inheritance
Inherited
  1. DcacheBase
  2. DcacheModule
  3. HasDcacheParameters
  4. HasRiftParameters
  5. Module
  6. RawModule
  7. BaseModule
  8. IsInstantiable
  9. HasId
  10. InstanceId
  11. AnyRef
  12. Any
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Visibility
  1. Public
  2. Protected

Instance Constructors

  1. new DcacheBase(edge: TLEdgeOut, id: Int)(implicit p: Parameters)

Type Members

  1. class DcacheIO extends Bundle

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##: Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: => T)(implicit sourceInfo: SourceInfo): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data)(implicit sourceInfo: SourceInfo): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _moduleDefinitionIdentifierProposal: String
    Attributes
    protected
    Definition Classes
    BaseModule
  8. def _traitModuleDefinitionIdentifierProposal: Option[String]
    Attributes
    protected
    Definition Classes
    BaseModule
  9. def addr_lsb: Int
    Definition Classes
    HasDcacheParameters
  10. def aluNum: Int
    Definition Classes
    HasRiftParameters
  11. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  12. def bk: Int
    Definition Classes
    HasDcacheParameters
  13. def bk_w: Int
    Definition Classes
    HasDcacheParameters
  14. def cb: Int
    Definition Classes
    HasDcacheParameters
  15. def cb_w: Int
    Definition Classes
    HasDcacheParameters
  16. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  17. def cl: Int
    Definition Classes
    HasDcacheParameters
  18. final val clock: Clock
    Definition Classes
    Module
  19. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
  20. def cmChn: Int
    Definition Classes
    HasRiftParameters
  21. val dEdge: TLEdgeOut
  22. val dcacheParams: DcacheParameters
    Definition Classes
    HasRiftParameters
  23. final val definitionIdentifier: String
    Definition Classes
    BaseModule
  24. def desiredName: String
    Definition Classes
    BaseModule
  25. def dptEntry: Int
    Definition Classes
    HasRiftParameters
  26. def dw: Int
    Definition Classes
    HasDcacheParameters
  27. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  28. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  29. def fRegNum: Int
    Definition Classes
    HasRiftParameters
  30. def fpuNum: Int
    Definition Classes
    HasRiftParameters
  31. def ftChn: Int
    Definition Classes
    HasRiftParameters
  32. final def getClass(): Class[_ <: AnyRef]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  33. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  34. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  35. val getUnit: Option[GetUnit]
  36. def hasDebugger: Boolean
    Definition Classes
    HasRiftParameters
  37. def hasL2: Boolean
    Definition Classes
    HasRiftParameters
  38. def hasLRU: Boolean
    Definition Classes
    HasRiftParameters
  39. def hasPreFetch: Boolean
    Definition Classes
    HasRiftParameters
  40. def hasSeed: Boolean
    Definition Classes
    HasId
  41. def hasVector: Boolean
    Definition Classes
    HasRiftParameters
  42. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  43. def hasuBTB: Boolean
    Definition Classes
    HasRiftParameters
  44. def hpmNum: Int
    Definition Classes
    HasRiftParameters
  45. val icacheParams: IcacheParameters
    Definition Classes
    HasRiftParameters
  46. val ifParams: IFParameters
    Definition Classes
    HasRiftParameters
  47. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  48. val io: DcacheIO
    Definition Classes
    DcacheBaseDcacheModule
  49. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  50. def isLowPower: Boolean
    Definition Classes
    HasRiftParameters
  51. def isMinArea: Boolean
    Definition Classes
    HasRiftParameters
  52. def l1BeatBits: Int
    Definition Classes
    HasRiftParameters
  53. def l1DW: Int
    Definition Classes
    HasRiftParameters
  54. def line_w: Int
    Definition Classes
    HasDcacheParameters
  55. val lsEntry: Queue[Dcache_Enq_Bundle]
  56. def maxRegNum: Int
    Definition Classes
    HasRiftParameters
  57. def memBeatBits: Int
    Definition Classes
    HasRiftParameters
  58. val missUnit: Option[MissUnit]
  59. def mulNum: Int
    Definition Classes
    HasRiftParameters
  60. final lazy val name: String
    Definition Classes
    BaseModule
  61. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  62. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  63. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  64. def opChn: Int
    Definition Classes
    HasRiftParameters
  65. val op_arb: Arbiter[Dcache_Enq_Bundle]
  66. implicit val p: Parameters
    Definition Classes
    DcacheModuleHasRiftParameters
  67. def parentModName: String
    Definition Classes
    HasId → InstanceId
  68. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  69. def pathName: String
    Definition Classes
    HasId → InstanceId
  70. def pkg_Dcache_Enq_Bundle(ori: Info_probe_req)(implicit p: Parameters): Dcache_Enq_Bundle
  71. def pkg_Dcache_Enq_Bundle(ori: Info_miss_rsp)(implicit p: Parameters): Dcache_Enq_Bundle
  72. def plen: Int
    Definition Classes
    HasRiftParameters
  73. def pmpNum: Int
    Definition Classes
    HasRiftParameters
  74. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  75. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  76. val probeUnit: Option[ProbeUnit]
  77. val putUnit: Option[PutUnit]
  78. val rd_arb: Arbiter[Dcache_Enq_Bundle]
  79. val reload_fifo: Queue[Dcache_Enq_Bundle]
  80. final val reset: Reset
    Definition Classes
    Module
  81. def resetType: Type
    Definition Classes
    Module
  82. val riftSetting: RiftSetting
    Definition Classes
    HasRiftParameters
  83. def rnChn: Int
    Definition Classes
    HasRiftParameters
  84. val rtn_fifo: Queue[Dcache_Deq_Bundle]
  85. def sbEntry: Int
    Definition Classes
    HasDcacheParameters
  86. def stEntry: Int
    Definition Classes
    HasDcacheParameters
  87. val stage: DcacheStage
  88. def suggestName(seed: => String): DcacheBase.this.type
    Definition Classes
    HasId
  89. final def synchronized[T0](arg0: => T0): T0
    Definition Classes
    AnyRef
  90. def tag_w: Int
    Definition Classes
    HasDcacheParameters
  91. def tlbEntry: Int
    Definition Classes
    HasRiftParameters
  92. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  93. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  94. def toString(): String
    Definition Classes
    AnyRef → Any
  95. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  96. val vParams: VectorParameters
    Definition Classes
    HasRiftParameters
  97. def vRegNum: Int
    Definition Classes
    HasRiftParameters
  98. def vlen: Int
    Definition Classes
    HasRiftParameters
  99. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  100. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException]) @native()
  101. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  102. def wbChn: Int
    Definition Classes
    HasRiftParameters
  103. val writeBackUnit: Option[WriteBackUnit]
  104. def xRegNum: Int
    Definition Classes
    HasRiftParameters

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.Throwable]) @Deprecated
    Deprecated
  2. def override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  3. def override_clock_=(rhs: Option[Clock]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  4. def override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

  5. def override_reset_=(rhs: Option[Bool]): Unit
    Attributes
    protected
    Definition Classes
    Module
    Annotations
    @deprecated
    Deprecated

    (Since version Chisel 3.5) Use withClock at Module instantiation

Inherited from DcacheModule

Inherited from HasDcacheParameters

Inherited from HasRiftParameters

Inherited from Module

Inherited from RawModule

Inherited from BaseModule

Inherited from IsInstantiable

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped