class FRegFiles extends RegFilesReal with RegFilesReName with FRegFilesLookup with RegFilesReadOP with RegFilesWriteBack with RegFilesCommit
Linear Supertypes
Ordering
- Alphabetic
- By Inheritance
Inherited
- FRegFiles
- RegFilesCommit
- RegFilesWriteBack
- RegFilesReadOP
- FRegFilesLookup
- RegFilesReName
- RegFilesReal
- RegFilesBase
- RiftModule
- HasRiftParameters
- Module
- RawModule
- BaseModule
- IsInstantiable
- HasId
- InstanceId
- AnyRef
- Any
- Hide All
- Show All
Visibility
- Public
- Protected
Instance Constructors
- new FRegFiles(dw: Int, dp: Int, rnc: Int, rop: Int, wbc: Int, cmm: Int)(implicit p: Parameters)
Type Members
- class RegFilesIO extends Bundle
- Definition Classes
- RegFilesBase
Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final def ##: Int
- Definition Classes
- AnyRef → Any
- final def ==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- def IO[T <: Data](iodef: => T)(implicit sourceInfo: SourceInfo): T
- Attributes
- protected
- Definition Classes
- BaseModule
- def _bindIoInPlace(iodef: Data)(implicit sourceInfo: SourceInfo): Unit
- Attributes
- protected
- Definition Classes
- BaseModule
- var _closed: Boolean
- Attributes
- protected
- Definition Classes
- BaseModule
- def _moduleDefinitionIdentifierProposal: String
- Attributes
- protected
- Definition Classes
- BaseModule
- def _traitModuleDefinitionIdentifierProposal: Option[String]
- Attributes
- protected
- Definition Classes
- BaseModule
- def aluNum: Int
- Definition Classes
- HasRiftParameters
- val arc: Int
- Definition Classes
- RegFilesReal
- val archit_ptr: Vec[UInt]
index that arc(32) commited register-sources point to, Avoid pointing to file-0
index that arc(32) commited register-sources point to, Avoid pointing to file-0
- Definition Classes
- RegFilesReal
- final def asInstanceOf[T0]: T0
- Definition Classes
- Any
- def circuitName: String
- Attributes
- protected
- Definition Classes
- HasId
- final val clock: Clock
- Definition Classes
- Module
- def clone(): AnyRef
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
- def cmChn: Int
- Definition Classes
- HasRiftParameters
- val cmm: Int
- Definition Classes
- RegFilesReal
- val dcacheParams: DcacheParameters
- Definition Classes
- HasRiftParameters
- final val definitionIdentifier: String
- Definition Classes
- BaseModule
- def desiredName: String
- Definition Classes
- BaseModule
- val dp: Int
- Definition Classes
- RegFilesReal
- def dptEntry: Int
- Definition Classes
- HasRiftParameters
- val dw: Int
- Definition Classes
- RegFilesReal
- final def eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def equals(that: Any): Boolean
- Definition Classes
- HasId → AnyRef → Any
- def fRegNum: Int
- Definition Classes
- HasRiftParameters
- val files: Vec[UInt]
- Definition Classes
- RegFilesReal
- val files_reg: Vec[UInt]
there are dp-1 files,
there are dp-1 files,
- Definition Classes
- RegFilesReal
- Note
the file(dp) is assert to be Zero
- def fpuNum: Int
- Definition Classes
- HasRiftParameters
- def ftChn: Int
- Definition Classes
- HasRiftParameters
- final def getClass(): Class[_ <: AnyRef]
- Definition Classes
- AnyRef → Any
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- def getCommands: Seq[Command]
- Attributes
- protected
- Definition Classes
- RawModule
- def getModulePorts: Seq[Data]
- Attributes
- protected[chisel3]
- Definition Classes
- BaseModule
- def hasDebugger: Boolean
- Definition Classes
- HasRiftParameters
- def hasL2: Boolean
- Definition Classes
- HasRiftParameters
- def hasLRU: Boolean
- Definition Classes
- HasRiftParameters
- def hasPreFetch: Boolean
- Definition Classes
- HasRiftParameters
- def hasSeed: Boolean
- Definition Classes
- HasId
- def hasVector: Boolean
- Definition Classes
- HasRiftParameters
- def hashCode(): Int
- Definition Classes
- HasId → AnyRef → Any
- def hasuBTB: Boolean
- Definition Classes
- HasRiftParameters
- def hpmNum: Int
- Definition Classes
- HasRiftParameters
- val icacheParams: IcacheParameters
- Definition Classes
- HasRiftParameters
- val idx_pre: IndexedSeq[UInt]
- Definition Classes
- RegFilesCommit
- val ifParams: IFParameters
- Definition Classes
- HasRiftParameters
- def instanceName: String
- Definition Classes
- BaseModule → HasId → InstanceId
- val io: RegFilesIO
- Definition Classes
- RegFilesBase → RiftModule
- final def isInstanceOf[T0]: Boolean
- Definition Classes
- Any
- def isLowPower: Boolean
- Definition Classes
- HasRiftParameters
- def isMinArea: Boolean
- Definition Classes
- HasRiftParameters
- def l1BeatBits: Int
- Definition Classes
- HasRiftParameters
- def l1DW: Int
- Definition Classes
- HasRiftParameters
- val log: Vec[UInt]
- Definition Classes
- RegFilesReal
- val log_reg: Vec[UInt]
there are dp-1 active log,
there are dp-1 active log,
- Definition Classes
- RegFilesReal
- Note
the log(0) is assert to be "b11".U
- def maxRegNum: Int
- Definition Classes
- HasRiftParameters
- def memBeatBits: Int
- Definition Classes
- HasRiftParameters
- val mollocIdx: Vec[UInt]
finding out the first Free-phy-register
finding out the first Free-phy-register
- Definition Classes
- RegFilesReName
- def mulNum: Int
- Definition Classes
- HasRiftParameters
- final lazy val name: String
- Definition Classes
- BaseModule
- final def ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- final def notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- final def notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- def opChn: Int
- Definition Classes
- HasRiftParameters
- implicit val p: Parameters
- Definition Classes
- RiftModule → HasRiftParameters
- def parentModName: String
- Definition Classes
- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- val phy: IndexedSeq[UInt]
- Definition Classes
- RegFilesReal
- def plen: Int
- Definition Classes
- HasRiftParameters
- def pmpNum: Int
- Definition Classes
- HasRiftParameters
- def portsContains(elem: Data): Boolean
- Attributes
- protected
- Definition Classes
- BaseModule
- def portsSize: Int
- Attributes
- protected
- Definition Classes
- BaseModule
- val raw: IndexedSeq[UInt]
- Definition Classes
- RegFilesReal
- val rename_ptr: Vec[UInt]
index that arc(32) renamed register-sources point to, Avoid pointing to file-0
index that arc(32) renamed register-sources point to, Avoid pointing to file-0
- Definition Classes
- RegFilesReal
- final val reset: Reset
- Definition Classes
- Module
- def resetType: Type
- Definition Classes
- Module
- val riftSetting: RiftSetting
- Definition Classes
- HasRiftParameters
- def rnChn: Int
- Definition Classes
- HasRiftParameters
- val rnc: Int
- Definition Classes
- RegFilesReal
- val rop: Int
- Definition Classes
- RegFilesReal
- def suggestName(seed: => String): FRegFiles.this.type
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- def tlbEntry: Int
- Definition Classes
- HasRiftParameters
- final def toAbsoluteTarget: IsModule
- Definition Classes
- BaseModule → InstanceId
- final def toNamed: ModuleName
- Definition Classes
- BaseModule → InstanceId
- def toString(): String
- Definition Classes
- AnyRef → Any
- final def toTarget: ModuleTarget
- Definition Classes
- BaseModule → InstanceId
- val vParams: VectorParameters
- Definition Classes
- HasRiftParameters
- def vRegNum: Int
- Definition Classes
- HasRiftParameters
- def vlen: Int
- Definition Classes
- HasRiftParameters
- final def wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException]) @native()
- final def wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- def wbChn: Int
- Definition Classes
- HasRiftParameters
- val wbc: Int
- Definition Classes
- RegFilesReal
- def xRegNum: Int
- Definition Classes
- HasRiftParameters
Deprecated Value Members
- def finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.Throwable]) @Deprecated
- Deprecated
- def override_clock: Option[Clock]
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
- def override_clock_=(rhs: Option[Clock]): Unit
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
- def override_reset: Option[Bool]
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
- def override_reset_=(rhs: Option[Bool]): Unit
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation