p

rift2Core

frontend

package frontend

Ordering
  1. Alphabetic
Visibility
  1. Public
  2. Protected

Type Members

  1. class BIM extends IFetchModule
  2. class BTB extends IFetchModule

    A branch target buffer (BTB) module for RISC-V processors.

  3. class Decode16 extends DecodeBase
  4. class Decode32 extends DecodeBase with Decode32G with Decode32FD
  5. trait Decode32FD extends AnyRef
  6. trait Decode32G extends AnyRef
  7. abstract class DecodeBase extends RiftModule
  8. class DecodeIO extends RiftBundle

    This class defines the input and output ports for a RISC-V 16-bit decoder.

  9. class FakeuBTB extends uBTBBase
  10. abstract class IF1Base extends IFetchModule

    instract fetch stage 1, generate pc

  11. class IF1NPredict extends IF1Base with IF1NuBTB
  12. trait IF1NuBTB extends AnyRef

    Trait that disables uBTB functionality

  13. class IF1Predict extends IF1Base with IF1uBTB

    Class that extends IF1Base and adds uBTB functionality.

  14. trait IF1uBTB extends AnyRef

    Trait that adds uBTB functionality to IF1GenModule

  15. class IF2 extends IF2Base with IF2MMU with IF2Fault with IF2FSM with IF2ICache with IF2Bus with IF2LoadIBuf with IF2Fence with IF2PreFetch
  16. abstract class IF2Base extends IcacheModule
  17. trait IF2Bus extends AnyRef
  18. trait IF2FSM extends AnyRef
  19. trait IF2Fault extends AnyRef
  20. trait IF2Fence extends AnyRef
  21. trait IF2ICache extends AnyRef
  22. trait IF2LoadIBuf extends AnyRef
  23. trait IF2MMU extends AnyRef
  24. trait IF2NCache extends AnyRef
  25. trait IF2PreFetch extends AnyRef
  26. class IF3 extends IF3Base with IF3_PreDecode with IF3_Predict with IF3_Update
  27. abstract class IF3Base extends IFetchModule

    instract fetch stage 3, instr pre-decode, realign, predict-state 1

  28. trait IF3_PreDecode extends AnyRef
  29. trait IF3_Predict extends AnyRef
  30. trait IF3_Update extends AnyRef
  31. class IF4 extends IF4Base with IF4_Decode with IF4_Predict with IF4SRAM
  32. abstract class IF4Base extends IFetchModule

    instract fetch stage 4, instr decode, predict-state 2

  33. trait IF4SRAM extends AnyRef
  34. trait IF4_Decode extends AnyRef
  35. trait IF4_Predict extends AnyRef
  36. trait NVDecode extends AnyRef
  37. class RAS extends IFetchModule
  38. class TAGE extends IFetchModule
  39. case class TageParams(tableInfo: Seq[(Int, Int)] = Seq(( 128, 2 ),
    ( 128, 4 ),
    ( 256, 8 ),
    ( 256, 16 ),
    ( 128, 32 ),
    ( 128, 64 ))    )     extends Product with Serializable
  40. class TageTable extends IFetchModule
  41. trait VDecode32 extends AnyRef
  42. class uBTB extends uBTBBase with uBTBLookup with uBTBFlush with uBTBUpdate
  43. abstract class uBTBBase extends IFetchModule
  44. trait uBTBFlush extends AnyRef
  45. trait uBTBLookup extends AnyRef
  46. trait uBTBUpdate extends AnyRef

Value Members

  1. object Decode16

    This object provides a method to instantiate a RISC-V 16-bit instruction decoder

  2. object Decode32

    This object implements a 32-bit RISC-V instruction decoder.

    This object implements a 32-bit RISC-V instruction decoder.

    Note

    It takes UInt inputs x and pc, along with a boolean hasFpu to indicate whether or not the processor has a floating point unit. An implicit Parameters object is also expected to be in scope.

  3. object PreDecode16
  4. object PreDecode32
  5. object Tage_Decode

Ungrouped