class Instruction_set extends RiftBundle
This class represents a bundle of all the supported Instruction Set Architectures (ISA). It provides access to different ISA types such as Arithmetic logic Unit (ALU), Branch and Jump Unit (BRU), Load Store Unit (LSU), Control and Status Register (CSR), Multiply and Divide Unit (MUL), Privileged instructions (Privilege_isa), and Floating Point Unit (FPU).
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Instance Constructors
- new Instruction_set()(implicit p: Parameters)
- p
Implicit parameter containing information about the processor's configuration.
Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
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- final def ##: Int
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- final def :=(that: => Data)(implicit sourceInfo: SourceInfo): Unit
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- final def <>(that: => Data)(implicit sourceInfo: SourceInfo): Unit
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- final def ==(arg0: Any): Boolean
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- def _cloneTypeImpl: Record
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- def _elementsImpl: Iterable[(String, Any)]
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- Bundle
- def _usingPlugin: Boolean
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- protected
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- Bundle
- val aluIsa: Alu_isa
- def aluNum: Int
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- final def asInstanceOf[T0]: T0
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- macro def asTypeOf[T <: Data](that: T): T
- Definition Classes
- Data
- final macro def asUInt: UInt
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- Data
- def autoSeed(name: String): Instruction_set.this.type
- Definition Classes
- Data → HasId
- def binding: Option[Binding]
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- protected[chisel3]
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- def binding_=(target: Binding): Unit
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- Data
- val bruIsa: Bru_isa
- def circuitName: String
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- def className: String
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- def clone(): AnyRef
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- @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
- def cloneType: Instruction_set.this.type
- Definition Classes
- Record → Data
- def cmChn: Int
- Definition Classes
- HasRiftParameters
- val csrIsa: Csr_isa
- val dcacheParams: DcacheParameters
- Definition Classes
- HasRiftParameters
- def do_asTypeOf[T <: Data](that: T)(implicit sourceInfo: SourceInfo): T
- Definition Classes
- Data
- def do_asUInt(implicit sourceInfo: SourceInfo): UInt
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- Aggregate → Data
- def dptEntry: Int
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- HasRiftParameters
- final lazy val elements: SeqMap[String, Data]
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- Bundle → Record
- final def eq(arg0: AnyRef): Boolean
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- def equals(that: Any): Boolean
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- def fRegNum: Int
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- HasRiftParameters
- val fpuIsa: Fpu_isa
- def fpuNum: Int
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- def ftChn: Int
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- final def getClass(): Class[_ <: AnyRef]
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- @native() @HotSpotIntrinsicCandidate()
- def getElements: Seq[Data]
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- final def getWidth: Int
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- Data
- def hasDebugger: Boolean
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- def hasL2: Boolean
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- def hasLRU: Boolean
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- def hasPreFetch: Boolean
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- def hasSeed: Boolean
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- def hasVector: Boolean
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- def hashCode(): Int
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- def hasuBTB: Boolean
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- def hpmNum: Int
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- val icacheParams: IcacheParameters
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- val ifParams: IFParameters
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- def ignoreSeq: Boolean
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- Bundle
- def instanceName: String
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- def isFS1: Bool
- def isFS2: Bool
- def isFS3: Bool
- def isFwb: Bool
- returns
A Boolean value indicating the whether a float point result will be written back.
- final def isInstanceOf[T0]: Boolean
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- def isLit: Boolean
- Definition Classes
- Data
- def isLowPower: Boolean
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- def isMinArea: Boolean
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- HasRiftParameters
- def isRS1: Bool
- def isRS2: Bool
- def isVM0: Bool
- def isVS1: Bool
- def isVS2: Bool
- def isVS3: Bool
- def isVwb: Bool
- final def isWidthKnown: Boolean
- Definition Classes
- Data
- def isXwb: Bool
- returns
A Boolean value indicating whether a integer result will be written back.
- def is_fpu_dpt: Bool
- returns
A Boolean value indicating whether the instruction is dispatched to FPU.
- def is_illeage: Bool
- returns
A Boolean value indicating whether the instruction is legal or not.
- def is_privil_dpt: Bool
- returns
A Boolean value indicating whether this a privileged instruction is dispatched.
- def l1BeatBits: Int
- Definition Classes
- HasRiftParameters
- def l1DW: Int
- Definition Classes
- HasRiftParameters
- def litOption: Option[BigInt]
- Definition Classes
- Aggregate → Data
- def litValue: BigInt
- Definition Classes
- Aggregate → Data
- val lsuIsa: Lsu_isa
- def maxRegNum: Int
- Definition Classes
- HasRiftParameters
- def memBeatBits: Int
- Definition Classes
- HasRiftParameters
- val mulIsa: Mul_isa
- def mulNum: Int
- Definition Classes
- HasRiftParameters
- final def ne(arg0: AnyRef): Boolean
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- final def notify(): Unit
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- final def notifyAll(): Unit
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- def opChn: Int
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- implicit val p: Parameters
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- RiftBundle → HasRiftParameters
- def parentModName: String
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- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- def plen: Int
- Definition Classes
- HasRiftParameters
- def pmpNum: Int
- Definition Classes
- HasRiftParameters
- val privil_isa: Privil_isa
- val riftSetting: RiftSetting
- Definition Classes
- HasRiftParameters
- def rnChn: Int
- Definition Classes
- HasRiftParameters
- def suggestName(seed: => String): Instruction_set.this.type
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
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- def tlbEntry: Int
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- final def toAbsoluteTarget: ReferenceTarget
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- final def toNamed: ComponentName
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- def toPrintable: Printable
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- def toString(): String
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- final def toTarget: ReferenceTarget
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- def typeName: String
- Definition Classes
- Data
- val vParams: VectorParameters
- Definition Classes
- HasRiftParameters
- def vRegNum: Int
- Definition Classes
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- val vecIsa: VecIsa
- def vlen: Int
- Definition Classes
- HasRiftParameters
- final def wait(arg0: Long, arg1: Int): Unit
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- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
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- final def wait(): Unit
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- def wbChn: Int
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- final def widthOption: Option[Int]
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- def xRegNum: Int
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- def finalize(): Unit
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